Infineon Technologies Patente

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A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method comprises generating the trench (110) in the semiconductor substrate (101); generating an oxide layer (120) over opposing sidewalls (110A, 110B) of the trench; damaging at least a portion (121) of the oxide layer by ion implantation; coating the oxide layer with an etching mask (130); generating at least one opening (131) in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth (ED) at the one of the opposing sidewalls (110A) by introducing an etching agent into the opening.

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A method of implanting an implant species into a substrate at different depths is described. The method includes forming an implant mask over the substrate. The implant mask includes a first implant zone designed as an opening and a second implant zone designed as a block array. The implant species is implanted through the implant mask under an implant angle tilted against a block plane. Thereby, a first implant area is formed by the implant species at a first depth in the substrate beneath the first implant zone, and a second implant area is formed by the implant species at a second depth in the substrate beneath the second implant zone. The first depth is greater than the second depth.

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One aspect relates to a method for producing an electronic module assembly. In that method, a curable first mass extending between a substrate assembly and a module housing is cured while a circuit carrier of the substrate assembly comprises at least a first temperature. Between a side wall of the module housing and the substrate assembly, an adhesive connection is formed by curing a curable second mass. Subsequent to curing the first mass, the circuit carrier is cooled down to below a second temperature lower than the first temperature.

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In an embodiment, a method for generating a target set using a radar includes: generating, using the radar, a plurality of radar images; receiving the plurality of radar images with a convolutional encoder; and generating the target set using a plurality of fully-connected layers based on an output of the convolutional encoder, where each target of the target set has associated first and second coordinates.

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A MEMS device comprises a first electrode structure and a second electrode structure forming a capacitive sensing arrangement. The MEMS device comprises a plurality of anti-stiction bumps arranged between the first electrode structure and the second electrode structure at a corresponding plurality of locations. The plurality of locations being projected into a main surface of the second electrode structure is distributed so as to comprise a first distribution density in a first main surface region of the main surface and so as to comprise second, different distribution density in a second main surface region of the main surface, the second main surface region being delimited from the first main surface region.

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In some examples, a device includes at least two light sources, buffer circuitry configured to receive a bit stream, and driver circuitry configured to receive the bit stream from the buffer circuitry and to drive the at least two light sources based on the bit stream. In some examples, the device further includes monitor circuitry configured to determine a voltage drop across each light source of the at least two light sources and snooping circuitry configured to read an inactive bit of the bit stream. In some examples, the snooping circuitry is further configured to read an active bit of the bit stream after reading the inactive bit and based on a value of the inactive bit and to cause the monitor circuitry to determine a voltage drop across a light source of the at least two light sources based on a value of the active bit.

The invention relates to a method for producing a metal-ceramic substrate (1, 11, 12), in which at least one metal layer (3) is attached to at least one surface side of a ceramic layer (2), which metal layer (3) is structured into several metallization regions (5, 6) respectively separated from one another by at least one trench-shaped intermediate space (4) to form conductive paths and/or connective surfaces and/or contact surfaces, wherein at least the intermediate space (4) is filled with an electrically insulating filler material (7). First edges (8) of the metallization regions (5, 6) facing and adjoining the surface side of the ceramic layer (2) in the intermediate space (4), as well as at least one second edge (9) of the metallization regions (5, 6) facing away from the surface side of the ceramic layer (2) in the intermediate space (4), are covered by the filler material (7). Furthermore, the invention relates to an associated metal-ceramic substrate (1, 11, 12).

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There are disclosed techniques (e.g., implemented in devices, methods and/or in non-transitory storage units) for confining wavelengths, e.g., using a pillar photonic crystal. A semiconductor device (10, 10a) may comprise: a pillar photonic crystal (11) including a structure (13, 13a) and a plurality of pillars (12) extending from the structure (13, 13a) in a height direction (z), wherein the plurality of pillars (12) form at least one waveguide (15) for electromagnetic radiation at a specific wavelength, the at least one waveguide (15) extending in at least one planar direction, wherein the structure (13, 13a) includes a confining layer (14) in doped semiconductor material to support propagation of surface plasmon polaritons.

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A method comprises heating a first electrically conductive layer (14) that is to be electrically contacted, and that is arranged on a first element (10), and pressing a first end (22) of a bonding wire (20) on the first electrically conductive layer (14) by exerting pressure to the first end (22) of the bonding wire (20), and further by exposing the first end (22) of the bonding wire (20) to ultrasonic energy, thereby deforming the first end (22) of the bonding wire (20) and creating a permanent substance-to-substance bond between the first end (22) of the bonding wire (20) and the first electrically conductive layer (14). The bonding wire (20) either comprises a rounded cross section with a diameter (d1) of at least 125µm or a rectangular cross section with a first width (w1) of at least 500µm and a first height (h1) of at least 50µm.