Infineon Technologies Austria

A semiconductor package includes a pre-package, a pre-package carrier on which the pre-package is mounted and an encapsulant embedding the pre-package and the pre-package carrier. The pre-package includes a power transistor chip having a first side and a second side opposite the first side. The power transistor chip is a lateral semiconductor device. A plurality of source load pads and a plurality of drain load pads are arranged at the first side of the power transistor chip. A pre-package body embeds the power transistor chip at least at its first side, the pre-package body comprising a first side facing away from the first side of the power transistor chip. A structured metal layer is disposed over the first side of the pre-package body. The structured metal layer comprises one continuous source load structure and one continuous drain load structure. A pre-package vertical interconnect runs through material of the pre-package body and is configured to connect at least some of the source load pads to the source load structure and at least some of the drain load pads to the drain load structure. The pre-package is mounted on the pre-package carrier with the structured metal layer facing the pre-package carrier.

A transistor device for high voltage and cryogenic applications. The transistor device comprises a drain extension region extending from a drain region towards a source region. The drain extension region is separated from the source region by a body region which is gated by a first gate electrode. The drain extension region increases the separation of the drain region with respect to the source region and the first gate electrode, reducing a risk of source-drain or gate-drain breakdown. A second gate electrode, different to the first gate electrode, is positioned over the drain extension region. A distance between the second gate electrode and the drain region, along a surface of the drain extension region, is no greater than 400 nm. The second gate electrode controls the conductivity of the drain extension region using an applied voltage, enabling the drain extension region to conduct at cryogenic temperatures.

A gate drive circuit for driving at least a first and a second power transistor between switching states, wherein the first and second power transistor are arranged in parallel between a first load node and a second load node, the gate drive circuit comprising: a control signal input node configured to receive a common control signal, temperature input nodes to receive a temperature signals indicative of a temperature of the power transistors, a delay determination unit configured to determine a delay signal comprising at least one of a turn-on delay value and a turn-off delay value based on a comparison of the temperatures of the first and second power transistors, a drive signal generation unit configured to generate a respective drive signals for driving the first and second power transistors based on the common control signal and the delay signal such that a time difference between a turn-on timing of the drive signals corresponds to the turn-on delay value and/or such that a time difference between a turn-off timing of the drive signals corresponds to the turn-off delay value, a first driver stage configured to provide the first drive signal at a first driving node and a second driver stage configured to provide the second drive signal at a second driving node.

The disclosed concepts relate to a power converter comprising a plurality of converter paths, each converter path comprising an input node, an output node, a first winding, and a second winding. The first winding is coupled in series between the input node and the second winding, and the second winding is coupled in series between the first winding and the output node. Each converter path is configured to conduct current in a same direction between the input node and the output node. The power converter further comprises one or more cores. Each winding of each converter path is inductively coupled to a winding of a different converter path by extending through a respective hole of one of the cores thereby forming a respective pair of inductively coupled windings. At least two of the pairs of inductively coupled windings extend through a same core.

The disclosed concepts relate to a power converter comprising a plurality of converter paths. Each converter path comprises an input node, an output node, a first winding, and a second winding. The first winding is connected in series between the input node and the second winding, and the second winding is connected in series between the first winding and the output node. Each converter path is configured to conduct current in a same direction between the input node and the output node. Further, each first winding of the converter paths is inductively coupled to a second winding of a different converter path to form a respective transformer.

The disclosed concepts relate to a power converter comprising a plurality of converter paths, each converter path comprising an input node, an output node, a first winding, and a second winding. The first winding is coupled in series between the input node and the second winding, and the second winding is coupled in series between the first winding and the output node. Each converter path is configured to conduct current in a same direction between the input node and the output node. Each winding of each of the converter paths is inductively coupled to a winding of a different converter path, thereby forming a respective pair of inductively coupled windings. Each of the plurality of converter paths further comprise an additional series inductance.

The disclosed concepts relate to the operation of a power converter (i.e., a circular voltage regulator) comprising at least four converter paths. Each converter path comprises an input node, an output node, a first winding, and a second winding, wherein the first winding is coupled in series between the input node and the second winding, and the second winding is coupled in series between the first winding and the output node. Each converter path is configured to conduct current in a same direction between the input node and the output node, and each winding of each of the converter paths is inductively coupled to a winding of a different converter path. Operating said power converter comprises receiving a phase firing sequence describing a sequence of selected converter paths amongst the converter paths, and providing a sequence of firing voltages to input nodes of the converter paths based on the phase firing sequence. At least one consecutive pair of selected converter paths in the phase firing sequence do not comprise windings that are inductively coupled with each other.

The disclosed concepts relate to elementary cells for a circular voltage regulator, a circular voltage regulator comprising a plurality of elementary cells, and methods of forming a circular voltage regulator using the elementary cells. Each elementary cell comprises one or more segments, each segment comprising a elementary cell input node configured for connection to a elementary cell output node of a segment, a elementary cell output node configured for connection to a elementary cell input node of a segment, a first half converter path comprising an input node coupled to the elementary cell input node, an output node, and a second winding coupled in series between the input node and the output node, and a second half converter path comprising an input node configured for connection to a respective phase input, an output node coupled to the elementary cell output node, and a first winding coupled in series between the input node and the output node. In some cases, each segment comprises one or more full converter paths, each full converter path comprising an input node configured for connection to a respective phase input, an output node, a first winding, and a second winding, wherein the first winding is coupled in series between the input node and the second winding, and the second winding is coupled in series between the first winding and the output node. The first half converter path, the second half converter path, and the one or more full converter paths are each configured to conduct current in a same direction between the respective input node and the respective output node. The second winding of the first half converter path is inductively coupled to a winding of one of the full converter paths, the first winding of the second half converter path is inductively coupled to a winding of one of the full converter paths, and each remaining winding of the full converter paths is inductively coupled to a remaining winding of a different converter path.

A mechanism for controlling current flow through conductive elements for a particle trapping device. A control arrangement is configured to control the operation of a switch arrangement to control the current flow between an input electrical interface and return electrical interface, via the conductive elements, to remain substantially constant, even whilst switching which conductive elements conduct the current.

An ion trap device includes a dielectric substrate and a via hole extending through the dielectric substrate from a first main surface of the dielectric substrate to a second main surface of the dielectric substrate. The ion trap device further includes an electrically conductive etch stop layer arranged on the first main surface of the dielectric substrate, wherein the etch stop layer covers the via hole. The ion trap device further includes a metal layer of an ion trap at least partially arranged on the etch stop layer and an electrically conductive material arranged in the via hole, wherein the etch stop layer electrically couples the electrically conductive material and the metal layer.