Samsung Electronics Patente

A semiconductor device includes a channel layer (132), a barrier layer (136) on the channel layer (132), a gate electrode layer (155) on the barrier layer (136) and extending in a first direction (D1) parallel to an upper surface of the barrier layer (136), a gate semiconductor layer (152) between the barrier layer (136) and the gate electrode layer (155), a source electrode (173) and a drain electrode (175) connected to the channel layer (132) and spaced apart from the gate electrode layer (155) in a second direction (D2) parallel to the upper surface of the barrier layer (136) and different from the first direction (D1), and a first barrier layer doping region (1361) within the barrier layer (136) and connected to the source electrode (173). In a cross-section in the second direction (D2) and in a third direction (D3) perpendicular to the upper surface of the barrier layer (136), an upper surface length of the gate electrode layer (155) is less than a lower surface length of the gate electrode layer (155).

Electronic device including first plate including first flat surface portion facing first direction, wherein first plate forms first surface of electronic device; second plate including second flat surface portion facing second direction opposite first direction, wherein second plate forms second surface of electronic device; side member including first metal part including first metallic material and forming at least part of third surface between first surface and second surface and second metal part including second metallic material, wherein second metal part is bonded with first metal part; and display disposed between first plate and the second plate so as to be shown through the first plate, wherein the first metal part and the second metal part form an interface including the first metallic material and the second metallic material, and wherein the interface is configured to face a third direction that is perpendicular to the first direction and the second direction.

Disclosed is a storage system, which includes a random access memory, a system power loss protection unit, a plurality of storage devices, and a processing unit that controls the random access memory, the system power loss protection unit, and the plurality of storage devices, and each of the plurality of storage devices assigns a persistent memory region (PMR) based on a capacity of the system power loss protection unit.

A method of image processing based on image restoration and a device for using the same are provided. The method includes segmenting a first original input image including a first background region and a first feature region into first patches, determining sampled patches by sampling background patches corresponding to the first background region preferentially over feature patches corresponding to the first feature region from the first patches, generating a first restored image by executing an image restoration model based on the sampled patches, and training the image restoration model to reduce a difference between the first original input image and the first restored image.

There is provided a compression method implemented by at least one hardware processor, including: acquiring attention data generated in a layer of a deep learning model based on an attention mechanism; converting a data format of the attention data into a converted data format, wherein a bit pattern of the attention data is maintained in converting the data format of the attention data into the converted data format; realigning, based on data characteristics of input data of the deep learning model, the attention data in the converted data format; and generating first compressed data by inputting the realigned attention data to an encoder model based on an artificial neural network.

A method and apparatus for generating data for training a machine-learning force field (MLFF) model are provided. The method of generating data for training the MLFF model includes generating product information based on received reactant information, generating labeled training data based on a density functional theory (DFT) calculation of the product information, identifying outlier data from verification data, based on an inference result of the verification data by the MLFF model trained based on the training data, and updating the training data based on the outlier data.

Provided is an image processing method. The method includes obtaining an input image, obtaining a sampling grid in which offset information is assigned to a predefined pixel grid, and applying the sampling grid to the input image to reconstruct pixels of the input image to generate a reconstructed image, wherein the offset information may include reconstruction location information for each pixel of the predefined pixel grid.

An electronic device includes a first housing part, a second housing part thinner than the first housing part, an asymmetric hinge structure rotatably connecting the second housing part to the first housing part, and a display disposed on the first housing part, the asymmetric hinge structure, and the second housing part. In a folded state of the first housing part and the second housing part, a portion of the display has an asymmetrical droplet shape that is more convex in a direction of the first housing part than a direction of the second housing part.

A semiconductor device includes a back interlayer insulating film (180); a plurality of first channel patterns (NS1) on the back interlayer insulating film (180) and spaced apart from each other in a vertical direction (DR3); a plurality of second channel patterns (NS2) on the back interlayer insulating film (180) and spaced apart from each other in the vertical direction (DR3); a source/drain pattern (160) between the first channel patterns (NS1) and the second channel patterns (NS2); and a source/drain contact (195, 295) connected to the source/drain pattern (160), wherein the source/drain pattern (160) includes a first layer (161) which comes into contact with (162) the first channel patterns (NS1) and the second channel patterns (NS2), a second layer (162) on or below the first layer (161), and a third layer (163) on or above the second layer (162), wherein a width of the first layer (161) in the vertical direction (DR3) decreases and then increases, along a direction from the first channel patterns (NS1) to the second channel patterns (NS2).

Embodiments of the disclosure relate to an electronic device including a flexible display. The electronic device may include a first housing, a second housing movably coupled to the first housing so as to allow the electronic device to transition between a slide-in state and a slide-out state, and a flexible display. The flexible display may include a display area, a first non-display area extending from the display area in a first direction, the first direction being a direction in which the flexible display moves when the electronic device transitions from the slide-out state to the slide-in state, and a second non-display area extending from the first non-display area in the first direction. The first non-display area may be an area in which a thin-film encapsulation layer having a structure in which an organic layer is disposed between two inorganic layers is formed, and the second non-display area may be an area in which a thin-film encapsulation layer having a structure in which the two inorganic layers are laminated is formed. The second non-display area may be positioned so as not to be included in the bending portion in any state of the electronic device.

A storage device includes a memory device and a memory controller to control the memory device by communicating with the memory device through a channel. The memory device includes a plurality of memory chips sharing the channel and each of the plurality of memory chips includes a transmission driver and an adaptive body bias generator. A target memory chip selected by the memory controller, among the plurality of memory chips, includes a first adaptive body bias generator and a first transmission driver. The first adaptive body bias generator applies a first body bias to the first transmission driver in a write mode in which the target memory chip receives a write data from the memory controller and applies a second body bias in a read mode in which the target memory chip transmits a read data to the memory controller.

An electronic device according to various embodiments of the disclosure may include a first housing, a second housing configured to move with respect to the first housing between a slide-in state and a slide-out state, a side key disposed on a side wall of the second housing and configured to press a side wall of the first housing when pressed, a first pressure sensor disposed in a first area of the first housing, and a second pressure sensor disposed in a second area of the first housing. The position of the side key may correspond to the first area of the first housing in the slide-in state and correspond to the second area of the first housing in the slide-out state. The first housing may be configured in a manner that the amount of deformation of the first area when the side key is pressed in the slide-in state and the amount of deformation of the second area when the side key is pressed in the slide-out state are substantially the same. Many other embodiments may be possible.

An optical modulator may include: a first semiconductor layer; a second semiconductor layer configured as a micro-disk, the second semiconductor layer being on the first semiconductor layer, and the second semiconductor layer including a first doping region and a second doping region, wherein a doping concentration of the first doping region is higher than a doping concentration of the second doping region; a first optical waveguide adjacent to the second semiconductor layer; a first electrode layer on the first doping region; and a second electrode layer on the first doping region and spaced apart from the first electrode layer, wherein the second semiconductor layer includes at least one recess, the second semiconductor layer has at least one step difference due to the at least one recess, and the first doping region, the second doping region, and the at least one recess comprise respective circular shapes, wherein all of the respective circular shapes are concentric with respect to one another.

A stacked integrated circuit device (1000) includes a plurality of nanosheet stack structures, a gate separator, a lower gate electrode, an upper gate electrode, a lower gate cut structure, an upper gate cut structure, and a coupling gate cut structure. The upper gate electrode extends along a side surface of the coupling gate cut structure and is electrically connected to the lower gate electrode.

A memory device includes: a first memory die (51) including a first monitoring pad connected to a monitoring line (ML1), and a first current monitoring logic configured to output a first current monitoring signal to the first monitoring pad; and a second memory die (52) including a second monitoring pad connected to the monitoring line (ML1), and a second current monitoring logic configured to output a second current monitoring signal to the second monitoring pad, wherein the first current monitoring signal includes first current data of N bits, the first current data including a peak value of a consumption current of the first memory die (51), N being a natural number equal to or greater than two, wherein the second current monitoring signal includes second current data of N bits, the second current data including a peak value of a consumption current of the second memory die (52), wherein the first current monitoring logic and the second current monitoring logic are configured to alternately occupy the monitoring line (ML1), and wherein the first current monitoring logic is configured to recover a first clock signal using the second current monitoring signal that is output to the monitoring line (ML1), and the second current monitoring logic is configured to recover a second clock signal using the first current monitoring signal that is output to the monitoring line (ML1).

An image sensor includes a sensor substrate including a first pixel group including a plurality of consecutively arranged first pixels, a second pixel group including a plurality of consecutively arranged second pixels, a third pixel group including a plurality of consecutively arranged third pixels, and a fourth pixel group including a plurality of consecutively arranged fourth pixels, and a nano-optical lens array including a first pixel-corresponding region facing the first pixel group, a second pixel-corresponding region facing the second pixel group, a third pixel-corresponding region facing the third pixel group, and a fourth pixel-corresponding region facing the fourth pixel group. The nano-optical lens array includes a plurality of nanoposts, and separates incident light according to wavelengths, multi-focuses green light on the plurality of first pixels and the plurality of fourth pixels, single-focuses blue light on the second pixel group, and single-focuses red light on the third pixel group.

In embodiments of the present disclosure, an electronic device may be provided. The electronic device may comprise a conductive portion forming at least a portion of a side of the electronic device; wireless communication circuitry; a printed circuit board (PCB) including a plurality of layers, on which the wireless communication circuitry is disposed; a radio frequency (RF) line structure disposed in the PCB and electrically connected to the wireless communication circuitry; and a contact member disposed on the PCB to electrically connect the RF line structure and the conductive portion. The RF line structure may include a first conductive line disposed on a first layer of the plurality of layers of the PCB, a second conductive line disposed on a second layer of the plurality of layers of the PCB, a first conductive via penetrating between the first layer and the second layer and coupled to a first portion of the first conductive line and a second portion of the second conductive line, and a second conductive via penetrating between the first layer and the second layer and coupled to a third portion of the first conductive line and a fourth portion of the second conductive line.

An embodiment of the present disclosure relates to a device and method for performing wireless LAN communication in an electronic device. The electronic device includes communication circuitry, at least one processor, and memory, in which, when executed by the at least one processor, the memory may store instructions that cause the electronic device to identify information relating to a DFS function of an external electronic device from a response message received from the external electronic device, when the information relating to the identified DFS function includes information indicating that the external electronic device is connected to a DFS owner AP, transmit a message including information causing the external electronic device to operate as a group owner for controlling a direct connection between the electronic device and the external electronic device via a wireless LAN. Other embodiments may be possible.

Provided are a capacitor, a semiconductor device including the capacitor, and a method of manufacturing the semiconductor device. The capacitor includes a first electrode, a second electrode opposing the first electrode, and a dielectric layer provided between the first electrode and the second electrode and including a rutile crystal phase. The first electrode includes a metal nitride, and the metal nitride includes a Group 5B element, or a Group 5B element and a Group 4B element.

An electronic device and an operating method thereof for dynamic subband operation (DSO) are provided. The operating method of the electronic device includes, after a first link is formed between the electronic device and an external electronic device broadcasting a wireless fidelity (Wi-Fi) signal, based on a presence of a second link between the electronic device and the external electronic device, transmitting data to the external electronic device by using a second profile. The first link is based on a first profile and the second link is based on the second profile.

An electronic device includes a first PCB, a second PCB, an interposer disposed between a first peripheral portion of the first PCB and a second peripheral portion of the second PCB, and one or more electronic components disposed in an internal space defined by a rear side of the first PCB, a front side of the second PCB, and an inner side of the interposer. The first PCB defines a first through hole positioned in the first peripheral portion, and the interposer defines a second through hole connected to the first through hole.

Methods and devices are provided in which a volume manager receives a command with a corresponding volume logical block address (vLBA) set. The volume manager determines a bucket of a variable-granularity volume map (VVM) for block volume storage in a storage device, based on the corresponding vLBA set. Entries of the VVM are divided into buckets and the entries comprise a variable vLBA range. The volume manager determines an entry for the vLBA set in the VVM or a fine-grained volume map (FVM) for the block volume storage, based on the determined bucket. The FVM comprises a per vLBA granularity.

Disclosed herein are methods, devices and systems including a first capacitor with a first electrode with a first segment and a second segment extending from a proximal end to a distal end in a first direction and joined at the proximal end by a connecting segment to form a mouth. A second electrode may have a third segment, a fourth segment, and a fifth segment, which form a fork facing the first electrode in the first direction. The fork may have a first slot enclosing the first segment between the third and fourth segments, and a second slot enclosing the second segment between the fourth and fifth segments. A first semiconductor channel may be on a side of the first electrode opposite the second electrode, with the first semiconductor having a first nub end extending in the first direction into the mouth at the proximal end. An intermediate dielectric layer may be between the first electrode and the second electrode, extending alongside the third, fourth, and fifth segment in the first and the second slot.

Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a substrate (100); an insulator (110) on an upper surface of the substrate (100); a transistor (140) between the substrate (100) and the insulator (110), the transistor (140) comprising: channel layers (102) that are spaced apart from each other in a first direction that is perpendicular to the upper surface of the substrate (100); and a gate structure (104, 106, 108) on the channel layers and the insulator (110), wherein a width (W1) of the insulator (110) in a second direction that is parallel with the upper surface of the substrate (100) is equal or substantially equal to a width (W1) of an uppermost one of the channel layers (102) in the second direction.

According to an embodiment of the disclosure, an electronic device may include: a first housing; a second housing rotatably coupled to one side of the first housing and configured to rotate between a position facing the first housing and a position extended side by side with the one side of the first housing; a third housing rotatably coupled to the other side of the first housing and configured to rotate between a position facing the first housing and a position extended side by side with the other side of the first housing, while being disposed between the first housing and the second housing; a second battery disposed inside the second housing; a second magnetic module disposed inside the second housing and disposed to directly face or directly contact the second battery; a third battery disposed inside the third housing; and a third magnetic module disposed inside the third housing and positioned to directly face or directly contact the third battery. In an embodiment, when the third housing is disposed between the second housing and the first housing in a position facing the first housing, the second magnetic module and the third magnetic module may be configured to generate magnetic attraction. Various other embodiments may also be possible.

A foldable electronic device includes a foldable housing including a first housing part, a second housing part, and a third housing part, a flexible display, and a front deco including a through hole. The third housing part includes a speaker and an audio duct. The speaker is configured to, in an unfolded state of the foldable electronic device, provide audio signals, via a first path formed by the audio duct and the through hole, toward a front side of the foldable electronic device, and in a folded state of the foldable electronic device, provide the audio signals, via a first path and a second path formed by a gap between the front deco and a rear surface of the first housing part, toward a lateral side of the foldable electronic device.

A semiconductor device and a data storage system including the same are provided. The semiconductor device (CH) includes: a lower structure (LS); and an upper structure (US) on the lower structure, wherein the upper structure comprises a first lower conductive pattern (204a); a second lower conductive pattern (204b), provided at a same level; a lower insulating structure (210) on the lower structure and on side surfaces of the first and second lower conductive patterns, having an upper surface at a level farther from the lower structure than that of the first and second lower conductive patterns; an upper conductive pattern (215) comprising a first portion (215b, 215c) on an upper surface of the lower insulating structure, a second portion (215a) extending from the first portion and contacting the upper surface of the first lower conductive pattern exposed by a first opening in the lower insulating structure, wherein at least a portion of the first portion of the upper conductive pattern has a spiral coil shape in a plan view.

An electronic device and a method of operating the electronic device according to an embodiment may include a communication circuit configured to support short-range wireless communication. The electronic device may include memory configured to store one or more computer programs. The electronic device may include at least one processor. The one or more computer programs may include instructions that, when executed individually or collectively by the at least one processor, cause the electronic device to transmit data to a first external electronic device belonging to a first group including the electronic device and the first external electronic device via the short-range wireless communication and/or receive data from a second external electronic device belonging to a second group including the electronic device and the second external electronic device via the short-range wireless communication. The instructions may cause, when executed individually or collectively by the at least one processor, the electronic device to detect activation of a service performed by a third external electronic device and the electronic device. The instructions may cause, when executed individually or collectively by the at least one processor, the electronic device to, based on capability information of the communication circuit and a characteristic of the service, determine whether to join a third group generated by the third external electronic device. The instructions may cause, when executed individually or collectively by the at least one processor, the electronic device to, based on determination to join the third group, join the third group while a state where the electronic device belongs to the first group and the second group is maintained.

Disclosed is a foldable electronic apparatus. The apparatus includes: a foldable housing configured to include a first housing part, a second housing part and a third housing part; a first hinge structure configured to rotatably connect the first housing part and the second housing part with each other; a second hinge structure configured to rotatably connect the second housing part and the third housing part with each other and include a first hinge assembly; and a flexible display disposed across the first housing part and the second housing part. The first hinge assembly includes: a first fixing bracket; a first rotating arm having one end rotatably connected to a first side of the first fixing bracket and the other end fixed to the second housing part; a second rotating arm having one end rotatably connected to a second side of the first fixing bracket and the other end fixed to the third housing part.

A semiconductor device includes a first structure (100) including first test pads (TP1), a second structure (200) disposed on the first structure (100) and including second test pads (TP2) that respectively correspond to the first test pads (TP1) and form a test pad chain (TPC) with the first test pads (TP1), a first terminal connected to one end of the test pad chain (TPC), a plurality of fault detection circuits (FDC) connected to the test pad chain (TPC) to detect a connection status of the test pad chain (TPC), and a second terminal connected to the other end of the test pad chain (TPC).

Provided is a stacked semiconductor device which includes: a substrate; a 1<st> source/drain region on the substrate; and a 2<nd> source/drain region vertically above the 1<st> source/drain region, the 2<nd> source/drain region vertically overlapping a 1<st> portion, among the 1<st> portion and a 2<nd> portion, of the 1<st> source/drain region, wherein a 1<st> portion of a top surface of the substrate vertically below the 1<st> portion of the 1<st> source/drain region and a 2<nd> portion of the top surface of the substrate vertically below the 2<nd> portion of the 1<st> source/drain region are coplanar or aligned.

Disclosed herein are methods, devices and systems including a first electrode (104), the first electrode (104) having a first electrode segment (111), a second electrode segment (109), and a third electrode segment (113). The first electrode segment (111) may be coupled to the second electrode segment (109), and the second electrode segment (109) may be coupled to the third electrode segment (113). A second electrode (114) may extend parallel to the first electrode (104). A first dielectric material (106) may be between the first electrode (104) and the second electrode (114), and a second dielectric material (108) may be between the first electrode segment (111) and the third electrode segment (113). A third electrode (116) may contact the first electrode (104), and the third electrode (116) may extend in a direction orthogonal to the first electrode (104). The first electrode segment (111) may extend parallel to the third electrode segment (113).

A foldable electronic device includes a foldable housing including a first housing part and a second housing part, and a hinge assembly configured to provide an unfolding movement and a folding movement. The hinge assembly includes a bracket, a first rotator rotatably coupled to the bracket, and a second rotator coupled to the first rotator, coupled to the second housing part, and rotatably coupled to the bracket through the first rotator. The second rotator is configured to rotate with respect to the bracket according to the folding movement. The first rotator is configured to start to rotate with respect to the bracket in conjunction with the second rotator, based on a rotation angle of the second rotator reaching a threshold angle according to the folding movement.

A foldable electronic device includes a foldable housing including a first housing part, a second housing part, and a third housing part, and a flexible display. The first housing part includes a bracket, a plate disposed between the bracket and a rear side of the first housing part, a printed circuit board (PCB) disposed on the bracket, impedance circuitry disposed on the PCB, and switch circuitry disposed on the PCB. The switch circuitry is configured to electrically connect the plate and the impedance circuitry based on a state of the foldable electronic device.

An electronic device may comprise a housing configured to form an outer surface of the electronic device and including a first housing, a second housing, and a third housing. In the unfolded state of the electronic device, the second housing may be positioned between the first housing and the third housing. The electronic device may comprise a first hinge configured to rotatably connect the first housing and the second housing, a second hinge configured to rotatably connect the second housing and the third housing, a flexible display disposed in the housing, a cover display disposed in the housing and configured to face a direction opposite to a direction which the flexible display faces in the unfolded state of the electronic device, a sensor including sensing circuitry, at least one processor including processing circuitry, and memory storing instructions. The instructions may, when executed by at least one processor individually or collectively, cause the electronic device to identify, using the sensor 176, a folding state of the electronic device. The folding state may include a first folding state in which, among a plurality of areas of the flexible display, an area corresponding to the first hinge and an area corresponding to the second hinge are folded, a second folding state in which one of the area corresponding to the first hinge or the area corresponding to the second hinge is folded, and a third folding state in which the area corresponding to the first hinge and the area corresponding to the second hinge are unfolded. The instructions may. when executed by at least one processor individually or collectively, cause the electronic device to identify, using the sensor, a change in the folding state of the electronic device. The instructions may, when executed by at least one processor individually or collectively, cause the electronic device to, based on a change in the folding state, compare previous display information with pattern information. The previous display information may include layout information and application information of a screen displayed before the folding state is changed. The pattern information may include a plurality of pieces of display information and information about a matching relationship between the plurality of pieces of display information. The instructions, when individually or collectively executed by at least one processor, may cause the electronic device to, based on the previous display information corresponding to one piece of the pattern information, determine next display information as display information matching to the previous display information among the pattern information. The next display information may include layout information and application information for setting a screen to be displayed after the folding state is changed. The instructions, when individually or collectively executed by at least one processor, may cause the electronic device to, based on the next display information, perform a screen construction of the cover display or the flexible display. The screen construction may include an operation for determining an application to be run and a layout of a screen to be displayed on the cover display or the flexible display. Other various embodiments are also available.

An electronic device is provided. The electronic device includes a display including first pixel groups and second pixel groups. When viewed from outside of the display, the first pixel groups are viewable based on a first viewing angle, and the second pixel groups are viewable based on a second viewing angle wider than the first viewing angle. When viewed in a substantially perpendicular direction to the display, a center of a pixel group among the first pixel groups surrounded by a plurality of pixel groups among the second pixel groups is substantially coincide with a center of a virtual polygon connecting centers of the plurality of pixel groups among the second pixel groups.

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